module addr_gen_imm(
  input  [31:0] base,
  input  [11:0] imm,
  input         up,
  output [31:0] out
);

wire [31:0] imm_ext;

assign imm_ext = {20'b0,imm};
assign out = up ? base + imm_ext : base - imm_ext;

endmodule
